A battery pack which holds a battery, such as a lithium ion battery, contains a protective integrated circuit which protects the battery, such as a secondary battery, from overdischarge and overcharge. FIG. 6 is a block diagram which shows a circuit structure of a conventional battery protective device contained in a battery pack, wherein the battery pack 1 is connected to a charger 2.
The battery pack 1 is comprised of a discharge FET Q1, which is a discharge control semiconductor device, a charge FET Q2, which is a charge control semiconductor device, and a discharge control circuit 101 and a charge control circuit 102, which control the ON and OFF states of the discharge FET Q1 and charge FET Q2, respectively. Battery pack 1 further contains an overdischarge detecting circuit 103 which detects overdischarge of the battery 10, an overcharge detecting circuit 104, which detects overcharge of the battery 10, and a discharge overcurrent detecting circuit 105, which detects discharge overcurrent of the battery 10 in a normal state. Dp1 and Dp2 are parasitic diodes of the discharge FET Q1 and the charge FET Q2, respectively. S1 and S2 denote sources, D1 and D2 denote drains, and G1 and G2 denote gates.
Battery pack 1 contains plus (+) and minus (−) output terminals of the battery 10. These output terminals become input terminals which input charge current from a charge circuit 20 of a charger 2 when the battery 10 is being charged.
Operation of the battery protective device is described with reference also to FIG. 7, which shows the charging characteristic of the battery 10, wherein a battery voltage and charge current of the battery 10 are shown (vertical axis) over time (horizontal axis). For illustrative purposes, the overcharge detecting voltage is 4.3 volts (V), the voltage released from overcharge is 4.0V, the overdischarge detecting voltage is 2.5V and the voltage released from overdischarge is 2.8V.
When charger 2 is connected to battery pack 1, the charger 2 charges the battery 10 using a constant-current charging and constant-voltage charging if the battery voltage is detected to be lower than a predetermined voltage. As shown in FIG. 7, when a normal charger 2 charges with a constant-voltage charge of 4.2V, the battery 10 will not be overcharged. However, if a “fault charger” or the like (such as a non-constant-current or non-constant-voltage charger) is connected to the battery, and the battery is being charged with a voltage over 4.2V, any overcharge voltage, for example of 4.3V, is detected and an overcharge protecting operation is executed.
FIG. 8 is a time chart which shows an overcharge protecting operation of a conventional battery protective device. The chart shows (A) a gate voltage of the discharge FET Q1, (B) a gate voltage of the charge FET Q2, (C) overcharge detecting voltage (overcharge detecting signal), (D) voltage between sources S1-S2 of the discharge FET Q1 and the charge FET Q2 (S1-S2 voltage signal), (E) the state of the battery pack and (F) voltage of the battery 10 (battery voltage).
The overcharge detecting circuit 104 (FIG. 6) monitors the battery voltage in order that battery 10 is not overcharged. When the detected voltage is lower than a predetermined overcharge detecting voltage (4.3V), the overcharge detecting circuit 104 outputs a “L” level (LOW) signal that informs the charge control circuit 102 that the battery is in a normal state. When the battery is in a normal state, the charge control circuit 102 turns the gate G2 of the charge FET Q2 to a “H” level (HIGH) signal, thus FET Q2 turns ON and conducts charge current. When the overcharge detecting circuit 104 detects a higher voltage than the predetermined overcharge detecting voltage (at time t1), the overcharge detecting circuit 104 turns its output to an H level, which informs the charge control circuit 102 of an overcharge state. In the overcharge state, the charge control circuit 102 turns the gate G2 of charge FET Q2 to an L level which turns FET Q2 OFF and cuts off the charge current to protect battery 10 from overcharge.
Thereafter, when the battery 10 is disconnected from the fault charger or the like and is connected to a load, a discharge current starts to flow. When the overcharge detecting circuit 104 senses a voltage lower than the predetermined release voltage (4.0V) caused by overcharge (time t2), the overcharge detecting circuit 104 turns its output signal to an L level, which informs the charge control circuit 102 that the overcharge state is released. Then the charge control circuit turns ON the charge FET Q2, and the battery 10 returns to a normal state.
In the normal state, and with reference to the time chart of FIG. 8(D), the voltage, ΔS, between S1 and S2 is:ΔS=(potential of S2)−(potential of S1)=(potential of S2)−GND(0V)=(potential of S2).In the first stage ΔS is a little minus, and just after the charge FET Q2 turns OFF, ΔS becomes equal to (battery voltage)−(charge voltage).
FIG. 9 is a time chart which shows the overdischarge protecting operation of a conventional battery protective device. The graphs presented show: (A) gate voltage of the discharge FET Q1, (B) gate voltage of the charge FET Q2, (C) an overdischarge detecting voltage (overdischarge detecting signal), (D) voltage between sources S1-S2 of the discharge FET Q1 and the charge FET Q2 (S1-S2 voltage signal), (E) the state of the battery pack and (F) voltage of the battery 10 (battery voltage).
When the battery pack 1 of FIG. 6 is connected to a load device (not shown in the drawing), the battery 10 is in a discharge mode to supply power to the load. The overdischarge detecting circuit 103 monitors the voltage of the battery 10 in order not to be overdischarged. When the detected voltage is higher than the predetermined overdischarge detecting voltage (2.5V), the overdischarge detecting circuit 103 turns its output signal to an L level (LOW), which informs the discharge control circuit 101 that the battery is in a normal state. When the battery is in a normal state, the discharge control circuit 101 turns the gate G1 of the discharge FET Q1 to an H level, causing FET Q1 to turn ON and conduct discharge current. When the overdischarge detecting circuit 103 senses a lower voltage than the predetermined overdischarge detecting voltage (at time t1), the overdischarge detecting circuit 103 turns its output to a H level, which informs the discharge control circuit 101 of overdischarge (FIG. 9, line C). In the overdischarge state, the discharge control circuit 101 makes the gate G1 of the discharge FET Q1 at an L level, which turns FET Q1 OFF and cuts off the discharge current, thereby protecting battery 10 from overdischarge.
Thereafter when the load device is disconnected from the battery 10 and the charger 2 is connected, charge current starts to flow. When the overdischarge detecting circuit 103 senses a higher voltage than the predetermined release voltage (in this example, 2.8V) from overdischarge, the overdischarge detecting circuit 103 turns its output signal to an L level, which informs discharge control circuit 101 that the overdischarge state is released (FIG. 9, lines C and F, at time t2). Upon receipt of the L level signal, the discharge control circuit 101 turns ON the discharge FET Q1, and the battery 10 returns to a normal state.
On the time chart of FIG. 9(D), the S1-S2 voltage ΔS is, as said above, equal to the potential of S2. In a first stage this voltage is slightly positive, and just after the discharge FET Q1 turns OFF, it becomes the battery voltage.
While the battery is discharging, the discharge overcurrent detecting circuit 105 monitors voltage, determined by converting the current through the discharge FET Q1 and the charge FET Q2, to protect the battery 10 from overcurrent by abnormal loading or short-circuiting of a load device. When the detected voltage is lower than a predetermined overcurrent detecting voltage, the discharge overcurrent detecting circuit 105 informs the discharge control circuit 101 of a normal state. In the normal state, the discharge control circuit 101 turns ON the discharge FET Q1 to conduct discharge current. If the discharge overcurrent detecting circuit 105 senses a higher voltage than the predetermined overcurrent detecting voltage, the discharge overcurrent detecting circuit 105 informs the discharge control circuit 101 of an overcurrent state. In an overcurrent state, the discharge control circuit 101 turns OFF the discharge FET Q1 to cut off the discharge current. Thus, the battery 10 is protected from overcurrent.
FIG. 10 is a charge and discharge operation table of a conventional battery protective device. FIG. 11 shows current paths during charge and discharge operations of a conventional battery protective device that shows current flow through a discharge FET Q1 and a charge FET Q2. In the drawing, FIG. 11(A) shows charge and discharge current paths in a normal state. FIG. 11(B) shows a current path in an overcharge-protected state, and FIG. 11(C) shows a current path in an overdischarge protected state.
Discharge current shown in FIG. 11(B) flows to discharge through a parasitic diode Dp2 of the charge FET Q2 when in an overcharge protected state, between times t1 and t2 of FIG. 8. Thus, the loss by forward voltage of the parasitic diode Dp2 generates heat, which can overheat the semiconductor integrated circuit (IC) device. If the discharge occurs with a high current, the semiconductor device can be thermally destructed.
The charge current (as illustrated by arrows) shown in FIG. 11(C) flows through a parasitic diode Dp1 of the discharge FET Q1 when in an overdischarge protected state, between times t1 and t2 of FIG. 9. Thus, the same as above, the loss by forward voltage of the parasitic diode Dp1 generates heat and can overheat the semiconductor integrated circuit device. If the charge occurs with a high current, the semiconductor device can be thermally destructed.
Now when charge and/or discharge (charge/discharge) current greater than a predetermined value flows for more than a predetermined period of time continuously, current through the parasitic diodes Dp1 and Dp2 can be suppressed and thermal destruction of the semiconductor prevented if the discharge FET Q1 and the charge FET Q2 are turned ON. Thus it has been proposed for a battery protective device to detect charge/discharge current by connecting a current detecting resistor in the current path of a serially connected discharge FET Q1 and charge FET Q2. (For example, refer to Japanese Unexamined Patent Application Publication No. 2002-204534, Paragraph [0017]-[0030], FIG. 1).
Another method proposed to prevent thermal destruction of a semiconductor is to turn OFF the charge FET Q2 upon detection of discharging during an ON state of the charge FET Q2 in an overcharge state, and to turn ON the discharge FET Q1 upon detection of charging during an OFF state of the discharge FET Q1 in an overdischarge state. (For example, refer to Japanese Unexamined Patent Application Publication No. H 10-290530, Paragraph [0015]-[0029], FIG. 1). In this case, discharge is detected by a voltage drop caused by discharge current through the discharge FET which is ON, and charge is detected by a voltage drop caused by charge current through the charge FET which is ON.
The above described structure of a conventional battery protective device is enabled to turn a switch off rapidly only when current flows in an unintended direction with continuous current detection. This way the power loss can be suppressed better than by using diodes.
However since a bi-directional switch has a very low resistance to suppress power loss, an “ON” resistance of a MOS switching element in a full-ON condition is as low as from several milli-ohms (mΩ) to several tens of mΩ. When a current, for example, of one amp (1 A) flows, a voltage difference appearing between both ends of a switch is very low, such as from several millivolts (mV) to several tens of mV. Therefore it is very difficult to detect the direction of current in such a case in order to detect the voltage drop caused by charge/discharge current through charge/discharge FETs because voltage drops through them are very low.
Since the voltage difference between two points (a source and drain of an FET) is measured where neither point is at ground potential, the circuit structure for solving this current detection problem has been difficult. Where current is detected using a switch associated parasitic diode, the voltage potential of an impurity diffusion region to isolate the substrate is down to the diode's forward voltage. Thus the parasitic diode is likely to cause extra current to flow in the substrate of an integrated circuit or in a power supply circuit. Especially in a device with a bi-directional switch and a control circuit that controls the ON and OFF states of the switch that are formed in the same semiconductor substrate, the semiconductor device is likely to malfunction due to power fluctuations and/or latch up caused by current sneaking this way into the circuit part.